This invention relates to an active matrix liquid crystal display panel and, more particularly, to an active matrix substrate incorporated in the active matrix liquid crystal display panel and a process for fabrication thereof.
A typical example of the active matrix substrate is illustrated in FIGS. 1 and 2. In order to clearly show the layout of electrodes, insulating layers are removed from FIG. 1. The prior art active matrix substrate includes a transparent insulating plate 41. Conductive strips 42b are patterned on the major surface of the transparent insulating plate 41 at intervals, and extend in parallel in a direction of row. The conductive strips 42b serve as gate lines, and gate electrodes 42a project from the gate lines 42b. The gate electrodes 42a and the conductive strips 42b are covered with a gate insulating layer 43.
Although plural semiconductor layers 44 are formed on the gate insulating layer 43, only one semiconductor layer 44 is shown in FIG. 1, and the gate electrode 43 is overlapped with the semiconductor layer 44. The semiconductor layer 44 has a rectangular shape, and provides a channel region.
Conductive strips 46 are formed on the gate insulating layer 43 at intervals, and extend in parallel in a direction of column. The gate electrodes 42a and, accordingly, the semiconductor layers 44 are located between the adjacent two conductive strips 46. The conductive strips 46 serve as source lines, and source electrodes 46a project from the source lines 46. The source electrode 46a is held in contact with one end portion of the semiconductor layer 44 through an ohmic contact layer 45.
Although plural conductive layers are formed in regions each defined by the adjacent two source lines 46b and the adjacent two gate lines 42b, only one conductive layer 47 is shown in FIG. 1. The conductive layer 47 serves as a drain electrode, and is held in contact with the other end portion of the semiconductor layer 44 through an ohmic contact layer 45.
The gate electrode 42a, the gate insulating layer 43, the semiconductor layer 44, the source electrode 46a and the drain electrode 47 as a whole constitute a thin film filed effect transistor, and the thin film field effect transistor is covered with a passivation layer 48. A pixel electrode 49 is formed on the passivation layer 48, and the adjacent two source lines 46b and the adjacent two gate lines 42b are partially overlapped with the periphery of the pixel electrode 49. The pixel electrode 49 is formed of transparent conductive material. A contact hole 51 is formed in the passivation layer 48, and the pixel electrode 49 is held in contact with the drain electrode 47 through the contact hole 51. The source line 46b is electrically connected through the thin film field effect transistor to the pixel electrode 49.
The gate lines 42b are connected through contact holes formed in the gate insulating layer 43 to gate terminals 42c as shown in FIG. 3, and the source lines 46b are connected through contact holes formed in the passivation layer 48 to data terminals 46c as shown in FIG. 4. Driving signals are selectively applied to the gate terminals 42c, and video data signals are selectively applied to the data terminals 46c. 
The thin film field effect transistor and the pixel electrode form a pixel together with a common electrode (not shown) and a piece of liquid crystal (now shown) between the pixel electrode 49 and the common electrode. The pixels are arranged in rows and columns, and are selectively energized for producing a picture on the active matrix liquid crystal display panel.
The driving signals are selectively propagated through the gate lines 42b to the gate electrodes 42a, and the associated thin film field effect transistors turn on so as to create conductive channels in the semiconductor layers 44. The video data signals are selectively supplied through the source lines to the source electrodes 46a, and reach the pixel electrodes 49 through the conductive channels. Thus, the electric charge is selectively accumulated in the pixel electrodes, and the charged pixel electrodes make the associated pieces of liquid crystal transparent. As a result, an image is produced on the matrix of pixels.
The prior art active matrix substrate is fabricated through a process described hereinbelow with reference to FIGS. 5A to 5K. The description is focused on the thin film field effect transistor, and the structure therearound.
The prior art process starts with preparation of the transparent insulting plate 41. Conductive metal such as Al, Mo or Cr is deposited to 100 nanometers to 400 nanometers thick over the major surface of the transparent insulating plate 41 by using sputtering. Photo-resist solution is spread over the entire surface of the conductive metal layer, and is baked. A pattern image of the gate lines/gate electrodes/gate terminals is transferred from a photo-mask to the photo-resist layer, and a latent image is produced in the photo-resist layer. The latent image is developed so as to form a photo-resist etching mask on the conductive metal layer. Thus, the photo-resist etching mask is formed through photo-lithographic techniques. Using the photo-resist etching mask, the conductive metal layer is selectively etched, and the gate lines/gate electrodes/gate terminals 42b/42a/42c are left on the major surface of the transparent insulating plate 41.
Subsequently, silicon nitride, amorphous silicon and heavily-doped n-type amorphous silicon are successively deposited over the entire surface of the resultant structure. The silicon nitride layer is 400 nanometers thick, and serves as the gate insulating layer 43. The amorphous silicon layer and the heavily-doped n-type amorphous silicon layer are 300 nanometers thick and 50 nanometers thick, respectively. A photo-resist etching mask (not shown) is patterned on the heavily-doped n-type amorphous silicon layer by using the photo-lithographic techniques, and the amorphous silicon layer and the heavily-doped n-type amorphous silicon layer are selectively etched. Upon completion of the etching, the amorphous silicon layer is patterned into the semiconductor layer 44, and the heavily-doped n-type amorphous silicon layer is laminated on the semiconductor layer 44.
Subsequently, conductive metal such as Mo or Cr is deposited to 100 nanometers to 200 nanometers thick over the entire surface of the resultant structure by using the sputtering technique, and a photo-resist etching mask (not shown) is patterned on the conductive metal layer by using the photo-lithographic techniques. Using the photo-resist etching mask, the conductive metal layer is selectively etched so as to form the source lines/source electrodes/drain electrodes/data terminals 46b/46a/47/46c on the gate insulating layer 43. The heavily-doped n-type amorphous silicon layer is partially overlapped with the source electrode 46a and the drain electrode 47.
Using the source/drain electrodes 46a/47 as an etching mask, the exposed portion of the heavily-doped n-type amorphous silicon layer is etched away, and the back channel region is exposed. The source electrode 46a and the drain electrode 47 are electrically connected through the ohmic layers 45 to the semiconductor layer 44 as shown in FIG. 5A.
Subsequently, silicon nitride is deposited to 100 nanometers to 200 nanometers thick over the entire surface of the resultant structure by using a plasma-assisted chemical vapor deposition. The silicon nitride layer serves as the passivation layer 48.
A photo-resist etching mask (not shown) is patterned on the passivation layer 48. Using the photo-resist etching mask, the contact hole 51, the contact hole for the data terminal 46c and the contact hole for the gate terminal 42c are formed in the passivation layer 48. The resultant structure is shown in FIG. 5B.
Transparent conductive material is deposited over the entire surface of the resultant structure. A photo-resist etching mask (not shown) is patterned on the transparent conductive layer by using the photo-lithographic techniques, and the transparent conductive layer is selectively etched away so as to from the pixel electrode 49 as shown in FIG. 5C.
The photo-lithography is repeated five times in the prior art fabrication process until completion of the prior art active matrix substrate. A counter substrate is prepared. The common electrode and color filters are formed on the counter substrate. The active matrix substrate is assembled with the counter substrate, and liquid crystal is sealed in the gap between the active matrix substrate and the counter substrate.
The region defined by the adjacent two gate lines 42b and the adjacent two source lines 46b is imperfectly covered with the pixel electrode 49 as will be understood from FIG. 1. Back light is leaked through the uncovered area, and makes the contrast of the image poor. A photo-shield photo-shield black matrix is effective against the leakage light. Misalignment between the photo-shield photo-shield black matrix and the prior art active matrix substrate is to be taken into account. The photo-shield photo-shield black matrix is enlarged, and occupies wide area. This means that the shield area is not ignoreable. Thus, a problem is encountered in the prior art active matrix substrate in a small aperture ratio.
A solution of the problem is disclosed in Japanese Patent Publication of Unexamined Application No. 10-39292. A color filter substrate is laminated on the active matrix substrate, and the prior art structure is called as xe2x80x9cCF-on-TFT structure (Color Filter on Thin Film Transistor structure)xe2x80x9d. The prior art CF-on-TFT structure is introduced as the first embodiment in the Japanese Patent Publication of Unexamined Application, and is hereinbelow described as the second prior art. Although the Japanese Patent Publication of Unexamined Application does not teach the complete process for fabricating the second prior art, the second prior art would be fabricated as follows.
FIGS. 6A to 6H illustrate the process for fabricating the second prior art. Firstly, thin film transistors 70a are fabricated on the transparent insulating plate 71, and, thereafter, covered with the passivation layer 78 as shown in FIG. 6A. The gate insulating layer, the gate electrode, the source electrode and the drain electrode are labeled with references xe2x80x9c73xe2x80x9d, xe2x80x9c72axe2x80x9d, xe2x80x9c76axe2x80x9d and xe2x80x9c77xe2x80x9d, respectively.
Subsequently, pigment dispersed photo-sensitive resin is spun onto the resultant structure. The spin coater is regulated in such a manner that the pigment dispersed photo-sensitive resin layer is 1.5 microns thick. The pigment dispersed photo-sensitive resin layer is patterned through the photolithography, and a photo-shield photo-shield black matrix 85 is left on the passivation layer 78 as shown in FIG. 6B. The contact hole forming area, the thin film field effect transistors 70a and the gate lines are covered with the photo-shield photo-shield black matrix 85 as shown in FIG. 6B.
Subsequently, ultra-violet light is radiated for cleaning and reforming the surface. Red pigment dispersed photosensitive resin is spun onto the resultant structure. The spin coater is regulated in such a manner that the red pigment dispersed photosensitive resin layer is 1.2 microns thick. Red filters 83a are patterned from the red pigment dispersed photosensitive resin layer by using the photo-lithography. The red filters 83a fill selected spaces in the photo-shield photo-shield black matrix 85 as shown in FIG. 6C.
Subsequently, ultra-violet light is radiated for cleaning, again. Green pigment dispersed photosensitive resin is spun onto the resultant structure. The spin coater is regulated in such a manner that the green pigment dispersed photosensitive resin layer is 1.2 microns thick. Green filters 83b are patterned from the green pigment dispersed photosensitive resin layer by using the photo-lithography. The green filters 83b fill other spaces in the photo-shield photo-shield black matrix 85 as shown in FIG. 6D.
Subsequently, ultra-violet light is radiated for cleaning, again. Blue pigment dispersed photosensitive resin is spun onto the resultant structure. The spin coater is regulated in such a manner that the blue pigment dispersed photosensitive resin layer is 1.2 microns thick. Blue filters 83c are patterned from the blue pigment dispersed photosensitive resin layer by using the photo-lithography. The blue filters 83c fill the remaining spaces in the photo-shield photo-shield black matrix 85 as shown in FIG. 6E. FIG. 6E shows a cross section taken along a line different from that used for the cross section shown in FIG. 6D.
Subsequently, photosensitive acrylic resin is spun onto the resultant structure. The photo-sensitive acrylic resin forms an over-coating layer 84 of 3 microns thick. The over-coating layer 84 creates a smooth surface. Contact holes 81 are formed in the over-coating layer 84 by using the photo-lithography as shown in FIG. 6F.
Subsequently, positive photo-resist is spun onto the over-coating layer 84. The positive photo-resist is in the novolak system. The positive photo-resist layer is patterned into a photo-resist etching mask 87 by using the photo-lithographic techniques. Using the photo-resist etching mask, the photo-shield photo-shield black matrix 85 and, thereafter, the passivation layer 78 are partially etched away so that the contact hole 81 reaches the drain electrode 77 as shown in FIG. 6G.
Finally, transparent conductive material is deposited over the entire surface of the resultant structure by using a sputtering. A photo-resist etching mask (not shown) is patterned through the photo-lithographic techniques, and the transparent conductive material layer is formed into the pixel electrodes 79. The pixel electrode 79 extends along the inner surface defining the contact hole 81, and is held in contact with the drain electrode 77. Thus, the pixel electrode 79 is connected through the thin film field effect transistor 70a to the associated source line.
The second prior art active matrix substrate enhances the aperture ratio, and is desirable for a large-sized active matrix liquid crystal display panel. Spherical spacers are randomly dispersed on the second prior art active matrix substrate, and the second prior art active matrix substrate is assembled with a counter substrate. The spherical spacers form a gap between the second prior art active matrix substrate and the counter substrate, and liquid crystal fills the gap. The manufacturer can not precisely control the gap with the spherical spacers. For this reason, Japanese Patent Publication of Unexamined Application No. 10-68956 proposes to replace the spherical spacers with plural column spacers. Although the Japanese Patent Publication of Unexamined Application does not teach a complete process sequence, the column spacers would be fabricated through a process shown in FIGS. 7A to 7C. The active matrix substrate fabricated through the process is described hereinbelow as the third prior art active matrix substrate.
The thin film transistor 110a is fabricated on the transparent insulating plate 111, and is covered with the passivation layer 118. The gate electrode, the gate insulating layer, the semiconductor layer, the source electrode and the drain electrode are labeled with references xe2x80x9c112axe2x80x9d, xe2x80x9c113xe2x80x9d, xe2x80x9c114xe2x80x9d, xe2x80x9c116axe2x80x9d and xe2x80x9c117xe2x80x9d, respectively. A photo-shield photo-shield black matrix 125 is formed over the thin film field effect transistors 110a as similar to the second prior art active matrix substrate.
Pigment dispersed photo-sensitive red color resist is spun onto the resultant structure. A photo-mask is aligned with the resultant structure such that parts of the pigment dispersed photo-sensitive red color resist layer for column spacers and red filters are irradiated with 365 nm wavelength light. The 365 nm wavelength light is radiated through the photo-mask to the parts of the pigment dispersed photo-sensitive red color resist layer at 100 mJ/cm2. The latent image is developed in solution containing KOH at 1% for 10 minutes. Then, the red filters 123a and lower parts 123axe2x80x2 of the column spacers are formed as shown in FIG. 7A.
Subsequently, pigment dispersed photo-sensitive green color resist is spun onto the resultant structure, and green filters 123b and intermediate parts 123bxe2x80x2 of the column spacers are formed as similar to the lower part 123axe2x80x2 and the red filters 123a. The resultant structure is shown in FIG. 7B.
Subsequently, pigment dispersed photo-sensitive blue color resist is spun onto the resultant structure, and blue filters 123c and upper parts 123cxe2x80x2 of the column spacers are formed as similar to the red filters 123a and the lower part 123axe2x80x2. 
Black resin layer is patterned in such a manner as to correspond to the thin film field effect transistors, and the column spacers are completed over the photo-shield photo-shield black matrix 125. The red/green/blue filters 123a/123b/123c and the passivation layer 118 thereunder are selectively removed so as to form contact holes 121. Transparent conductive material such as ITO is deposited over the entire surface of the resultant structure, and the transparent conductive layer is patterned into pixel electrodes 119. The pixel electrode 119 penetrates through the contact hole 121, and is held in contact with the drain electrode 117 of the associated thin film field effect transistor 110a as shown in FIG. 7C.
The lower/intermediate/upper parts 123axe2x80x2/123bxe2x80x2/123c xe2x80x2 are patterned together with the color filters 123a/123b/12c, and the column spacers are exactly adjusted to a target height. In other words, the total thickness of the red/green/blue filters 123a/13b/123c is proportional to the height of the column spacers. This means that the thickness of the red/green/blue filters 123a/123b/123c are dominated by the gap to be created between the third prior art active matrix substrate and the counter substrate. Even if the red/green/blue filters are to be thicker than the red/green/ blue filters 123a/123b/123c are, it is impossible to employ the thick red/green/blue filters in the third active matrix substrate. As a result, the prior art active matrix liquid crystal display panel fails to realize the chromaticity to be requested.
The problem inherent in the third prior art active matrix substrate is the undesirable linkage between the height of the column spacers and the thickness of the filters 123a/123b/123c. A solution is proposed in Japanese Patent Publication of Unexamined Application No. 10-186379. The active matrix substrate disclosed in the Japanese Patent Publication of Unexamined Application is hereinbelow referred to as xe2x80x9cfourth active matrix substratexe2x80x9d, and the fourth active matrix substrate is to be fabricated through a process shown in FIGS. 8A to 8F.
Thin film filed effect transistors 150a are fabricated over a transparent insulating substrate 151. The thin film field effect transistor 150a includes a gate electrode 152a connected to an associated gate line, a gate insulating layer 153, a semiconductor layer 154, a source electrode 156a connected to a source line and a drain electrode 157. The thin film field effect transistors 150a and exposed area of the gate insulating layer 153 are covered with an overcoat layer 164. The resultant structure is shown in FIG. 8A.
The resultant structure is subjected to the cleaning with ultra-violet light. Pigment dispersed photo-sensitive red color resist is spun onto the overcoat layer 164. The spin coater is regulated in such a manner that the pigment dispersed photo-sensitive red color resist layer is 1.2 microns thick. The pigment dispersed photo-sensitive red color resist layer is patterned into red color filters 163a through the photo-lithography as shown in FIG. 8B.
Subsequently, the resultant structure is subjected to the cleaning with ultra-violet light. Pigment dispersed photo-sensitive green color resist is spun onto the overcoat layer 164. The spin coater is regulated in such a manner that the pigment dispersed photo-sensitive green color resist layer is 1.2 microns thick. The pigment dispersed photo-sensitive green color resist layer is patterned into green color filters 163b through the photo-lithography as shown in FIG. 8C. The red filters 163a are not overlapped with the green filters 163b, but the red filters 163a and the green filters 163b are continued on the overcoat layer 164.
Subsequently, the resultant structure is subjected to the cleaning with ultra-violet light. Pigment dispersed photo-sensitive blue color resist is spun onto the overcoat layer 164. The spin coater is regulated in such a manner that the pigment dispersed photo-sensitive blue color resist layer is 1.2 microns thick. The pigment dispersed photo-sensitive blue color resist layer is patterned into blue color filters 163c through the photo-lithography as shown in FIG. 8D. The red/green filters 163a/163b are not overlapped with the blue filters 163c, but the red/green/blue filters 163a/163b/163c are continued on the overcoat layer 164.
Subsequently, contact holes 161 are formed in the red/green/blue filters 163a/163b/163c and the overcoat layer 164, and the drain electrodes 157 are exposed to the contact holes 161, respectively. The resultant structure is shown in FIG. 8E.
Subsequently, transparent conductive material is deposited over the entire surface of the resultant structure by using the sputtering, and the transparent conductive layer is patterned into pixel electrodes 159 through the photo-lithography followed by etching. The pixel electrodes 159 penetrate through the contact holes 161, and are held in contact with the drain electrodes 157, respectively.
Finally, black resin is spread over the entire surface of the resultant structure, and the black resin layer is patterned into a photo-shield black pattern 165. The photo-shield black pattern 165 is located over the thin film field effect transistors 150a, and serves as column spacers. Thus, the photo-shield black pattern 165 is independent of the red/green/blue filters 163a/163b/164c. For this reason, the red/green/blue filters 163a/163b/163c and the photo-shield black pattern 165 are designed to have an appropriate thickness and an appropriate height, independently.
The fourth prior art active matrix substrate is free from the problems inherent in the first to third prior art active matrix substrates. However, a problem is encountered in the fourth prior art active matrix substrate in that the photo-shield black pattern or the column spacers are liable to be separated from the red/green/blue filters 163a/163b/163c during the rubbing on an orientation layer. The separation is due to poor adhesion between the photo-shield black pattern and the red/green/blue filters 163a/163b/163c, and the coloring agent in the photo-shield black pattern is causative of the poor adhesion. In case where the photo-shield black pattern is formed of black pigment dispersed resin, the black pigment is the coloring agent. A photo-shield black pattern is formed of carbon-containing resin. The carbon particles are the coloring agent.
It is therefore an important object of the present invention to provide an active matrix substrate, which has column spacers for adjusting a gap to appropriate height without separation, deviation from target chromaticity and leakage light.
It is also an important object of the present invention to provide a process for fabricating the active matrix substrate.
To accomplish the object, it is proposed to form at least one protrusion integral with a remaining portion of a protective layer.
In accordance with one aspect of the present invention, there is provided an active matrix substrate forming parts of a display panel together with a counter substrate comprising a plate having a major surface, a multiple layered device structure laminated on the major surface and including conductive layers forming parts of pixels, an optically modulating structure laminated on the multiple layered device structure and including color filters, and a protective structure laminated on the optically modulating structure and including a protective layer formed of photo-sensitive material and having at least one protrusion projecting from a remaining portion thereof toward an inner surface of the counter substrate.
In accordance with another aspect of the present invention, there is provided a process for fabricating an active matrix substrate comprising the steps of a) preparing a plate having a major surface, b) laminating a multiple layered device structure on the major surface for providing conductive layers forming parts of pixels, c) laminating an optically modulating structure on the multiple layered device structure for providing color filters to the parts of the pixels, d) covering the optically modulating structure with a photo-sensitive layer, e) exposing the photo-sensitive layer to an image-carrying light for producing at least two portions different in solubility to a developer, f) treating the photo-sensitive layer with the developer so as to form a protective layer having at least one protrusion projecting from a remaining portion thereof and g) completing the active matrix substrate.